Mustafa7 - @shibo https://github.com/tscircuit/...
mention https://github.com/tscircuit/core/pull/2711/files I think your checks fixes broke some tests in core(not sure) https://github.com/tscircuit/core/pull/2709
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mention https://github.com/tscircuit/core/pull/2711/files I think your checks fixes broke some tests in core(not sure) https://github.com/tscircuit/core/pull/2709
These 2 PRs from me are still sitting at the 2 week mark. I confirmed the issue described still exists, and updated them so they are once again green. 596: https://github.com/tscircuit/circuit json to kicad/pull/596 552: https://github.com/tscircuit/circuit json to kicad/pull/552
mention the symbol style inconsistencies happened partly because we used tscircuit native symbols for most and custom symbols for some, the kicad converter on the other hand uses custom symbols for everything. Now which method should we stick with and enforce?
Hey, claude told me this: is it true for tscircuit? Also is there any way to edit small things in tscircuit without asking my claude / json to do it... I feel like would be faster for me to just manually adit small things. Thanks
Going to run an experiment and get a fast sd card for my mac to try to store stuff like the bun cache or tools i don't use frequently (kicad, CCStudio etc.) CC mention
is the KiCad importer and Bundled exporter normal
bumping this as important and serious, see latest comments: https://github.com/tscircuit/circuit json to kicad/issues/579
what workflow do you guys recommend if autorouting doesnt do it for your board because its too complex? like export to kicad and back to tscircuit somehow or not sure whats the most seamless taking into account that i need jlcpcb compatible exports at the end of it
Hey mention could you have a review of this ? https://tscircuit.com/pixalynx/p4 media stick files something it has a circuit.json file which has the routing and I saw Astra use free router to do this But the index.circuit.tsx is not showing the traces But Astra is telling be this
Its merged now, so to fix my current board do I need to give it any specific prompt ?
Guys i have been doing some one shot prompt board and capture their benchmark to see how the AI working with kicad and tscircuit here is the results https://tscircuit gpt benchmark.vercel.app/
Hey guys, completely vibe coded this, wondering if i could get some feedback if it looks correct? https://tscircuit.com/pixalynx/esp32 usb ducky
The timing in tscircuit is lot but kicad did that in quick check the RP2040 robot controller here https://tscircuit gpt benchmark.vercel.app/
https://0hmx.com/artifacts/i2c kicad routing replay 2026 09 06/ this is how i did the routing as my ai says
for footprint="pinrow3 p2.54 id1.016 od1.88 pinlabeltextalignright pinlabelorthogonal nosquareplating" it generates a courtyard, we should add a way to change the courtyard's default dimension somehow
mention after fabrication the default silkscreen size of components sucks
Hey tscircuit peeps! How to fix drill file not populating? ISSUE: Drill holes not showing up in drill file when file export fabrication files & upload to JLCPCB context: im building a keyboard with @tsci/seveibar.keyboard utils WORKAROUND FIX: import and export using kicad. any t
i wonder if we should switch the netlabel style to altium style net labels
https://esp32 bluetooth speaker.tscircuit.app/ file=index.circuit.tsx
looks like bad dep verison for autorouter or something
RE: circuit json to altium
mention mention wip BOOSTXL TLV8544PIR booster board https://tscircuit.com/editor?package id=bed74543 57fe 4324 8e84 63b1dadd5986&file path=index.circuit.tsx
can we have a new check called "tsci check silkscreen" to check the silkscreen overlaps with other courtyard , pad, other texts , .. etc ??
I need someone to write a guide on importing from Ultra Librarian to tscircuit
while testing a circuit json to kicad repro, I noticed that the GitHub test workflow fails before running any tests. oven sh/setup bun downloads Bun as a ZIP, but the KiCad container cannot find unzip. Re running gives the same error. Is this a known issue, and should the workflo
Hey mention , floating a proposal before I over build it. footprinter has no land pattern engine: every footprint is hand tuned, so pads drift from KiCad wherever nobody tuned them (QFN too small in 413, soic8 in 274, the four courtyard exempt parts in 731). Nothing in the org co
mention If I want to make changes to the analog simulations, do I PR to the previous RFC or make a new one?
Hey folks. I am still rather new to tscircuit so if I am asking this in the wrong place lmk where I should ask. I have finished laying out a circuit in tscircuit and it seems to be working well for everything I need so far, except for traces. The autorouter seems to be creating s
Maybe this is how trace names should be displayed, instead of adding a separate label for each trace name. I’m not sure, though.
I added some new stuff to the https://cad component viz.vercel.app/ check it out
Could I get everyone’s opinion on this? I added several Board Surface Texture options so we can compare them and choose the best looking one. To test: 1. Make sure Realistic Presentation Mode is enabled. 2. Right click the viewer. 3. Open Board Surface Texture and try the options
mention can you share the link of the via issue in the pcb view
my autorouting skipped 😭 , that is ok for me to have that DRC (e.g footprint overlap) .
mention I've been creating a repo that allows us to benchmark AI's ability to use TSX to recreate kicad schematics, i think it's really really interesting how we are messing up schematic traces, there is clearly so much work we can do to be conventional/readable
mention Should keepouts be drawn using the courtyard? courtyard rect already supported.
mention https://github.com/tscircuit/check shorts/actions/runs/29109528717/job/86424789636
Anyone can help me with a solution for this issue , "edge cutouts are being emitted as separate" That is fine for cutouts fully inside the board, but wrong when the cutout touches the board edge. A circle on the edge becomes a full circle in Gerber, so the outside half makes the
whats wrong with the capacitor symbol?
so many low hanging fruit, why have we had this bug? Cmon guys schematic needs to get fixed QUICK
After i remove the deps i got this output code sample
Hey I'm searching through the issues and PRs on the GitHub repo and I couldn't find this. Maybe I wasn't looking too hard but is there any near term plan for dark mode?
Can I introduce corner radius for KiCad compatible pads? It should make it easier to determine the percentage difference for pads.
I'm looking for MOLEX 90130 3120 connector library, which is not directly available from jlcpcb or any other tscircuit repositories. It is available from ultra librarian. What is the easiest method to convert it to tscircuit library? Should I download KiCAD files and try to conve
mention
Anyone working on kicad schematic sheet conversion
we may need to rescale all of our schematic symbols to match kicad/common conventions around A4 paper otherwise our units make very little sense unfortunately this is a really hard migration to do...
mention I’m noticing that we’re converting the fabrication layer into silkscreen and the courtyard layer into fabrication. This doesn’t seem correct to me. i think both are incorrect conversion in circuit json to tscircuit?
Are there smaller resistor / capacitor symbols (similar to how KiCad has R and R small)?