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Am I not getting something or is it a known limitation? https://tscircuit.com/editor?template=blank circuit board data:application/gzip;base64,H4sIAGodU2oAA7WSXUsrMRCG/0rIlYKN27V76hFXOBxBvBGt4o2RJW7HurI7WZJUKqX/3cl+tLWtWoTuzSYz77x5Mpkpz3AIE+HshJ/wrCi1cWwAKnXs2eiCSW78RnKJEmFSpVON1
mention
Abse 42 messagesI'd like to train the AI in our skill to be able to resolve autorouter issues using <autoroutingphase / i think this would be much better than the AI constantly switching to sequential trace autorouting
Seve 6 messagesCan someone look into this? https://github.com/tscircuit/tscircuit.com/issues/3704
Seve 19 messagesmention
shibo 3 messagesI added some new stuff to the https://cad component viz.vercel.app/ check it out
Abse 48 messagesSomething is most likely busted in the autorouter somehow and it's throwing more DRC errors and i had to add tsci build ignore errors to the smoke tests to unblock the pipeline. I don't think I caused this with jumper autorouting because jumper autorouting isn't being used on the
Seve 2 messages