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Seve - SHIBO'S BOARD IS FUNCTIONAL!!!!! https:/...

SHIBO'S BOARD IS FUNCTIONAL!!!!! https://x.com/seveibar/status/2095240476882583800?s=20

Seve 3 messages

Seve - @shibo ‘s board arrived!!! Has messed up...

mention ‘s board arrived!!! Has messed up holes 😭

Seve 11 messages

0hmx - any idea on how to get really realistic ...

any idea on how to get really realistic code render code editor

0hmx 3 messages

mohan-bee - @Seve @Rishabh @0hmx etc.. i hav...

mention mention mention etc.. i have been trying to route this board , but this stuck at some phases ,, any tips .. so that this board gets routed successfully ..

mohan-bee 5 messages

0hmx - not sure how usefull but srj to video ht...

not sure how usefull but srj to video https://github.com/0hmX/srj video

0hmx 10 messages

Seve - @Abse found a really good repro, super s...

mention found a really good repro, super small and tons of trace bugs https://github.com/tscircuit/ti/pull/134/files diff 6fb420e46f6876a56a2e3d3a178f2c8572dcea1df084f9823ec9c7f63f00b03e

Seve 18 messages

Seve - @Rishabh check out this preview link, sa...

mention check out this preview link, says error https://tscircuit.com/abse/wifi smart switch files

Seve 3 messages

Abse - @Seve

mention

Abse 82 messages

! Rushabh | Linux Shill 28 messages

Seve - @Abse no holes in your board

mention no holes in your board

Seve 5 messages

# contributor4 days ago

Seve - @Rishabh IMPLICIT COPPER POURS

mention IMPLICIT COPPER POURS

Seve 9 messages

# contributor5 days ago

! Rushabh | Linux Shill - for footprint="pinrow...

for footprint="pinrow3 p2.54 id1.016 od1.88 pinlabeltextalignright pinlabelorthogonal nosquareplating" it generates a courtyard, we should add a way to change the courtyard's default dimension somehow

# contributor5 days ago

! Rushabh | Linux Shill - why do we generate bo...

why do we generate both, we should jsut create .agents/ should i remove .claude/ <@&1420812538421051555

! Rushabh | Linux Shill 3 messages

# contributor5 days ago

mohan-bee - @Seve after fabrication the defaul...

mention after fabrication the default silkscreen size of components sucks

mohan-bee 23 messages

# contributor6 days ago

Seve - @Abse this you? Did you respond?

mention this you? Did you respond?

Seve 22 messages

# contributor7 days ago

techmannih - vercel deployment is failing @Sev...

vercel deployment is failing mention https://github.com/tscircuit/ti/pull/214

techmannih 1 message

# contributor8 days ago

shibo - @Seve these issues are blocking me from...

mention these issues are blocking me from routing the AM62L board, a lot of progress was made, it's nearly there https://github.com/tscircuit/tscircuit autorouter/pull/2247 https://github.com/tscircuit/tscircuit autorouter/pull/2248 https://github.com/tscircuit/tscircuit autorout

shibo 57 messages

# contributor8 days ago

! Rushabh | Linux Shill - Why does this board r...

Why does this board require maxDecouplingTraceLength="6mm" instead of the default 1 mm? Is there a way to fix the routing by repositioning the components, or is 6 mm the safest solution without significantly changing the physical layout?

! Rushabh | Linux Shill 8 messages

Mustafa7 - Why core tests taking so much time t...

Why core tests taking so much time to finish locally, literally takes hour to finish

Mustafa7 19 messages

Seve - Guys as of yesterday, schSize="sm" and s...

Guys as of yesterday, schSize="sm" and schSize="xs" is available for <resistor / and <capacitor /

Seve 1 message

Mustafa7 - What is up with github?

What is up with github?

Mustafa7 1 message

Rishabh - Why was this text on components and p...

Why was this text on components and ports introduced to the schematic trace solver test snapshots? It is making things difficult to review

Rishabh 5 messages

drew_hamilton 16 messages

drew_hamilton - I ♥️convex optimization

I ♥️convex optimization

drew_hamilton - U guyz I have so many ideas I w...

U guyz I have so many ideas I wanna play around with for optimizing funky bus routes

drew_hamilton 1 message

techmannih - Screenshot2026-08-21at11.27.07.png

Can we introduce thermalPadNotchLeft and thermalPadNotchRight for these types of thermal pads? ehh you would need to show it's more universal i don't know if this is common if it's in IPC then we could yeah, makes sense. gotcha mention It seems too expensive and is also out of st

techmannih 24 messages

0hmx - My ai and some of its life demands as i ...

My ai and some of its life demands as i am building the boards! i think the erc is good!

0hmx 1 message

0hmx - https://github.com/tscircuit/ti/pull/120...

https://github.com/tscircuit/ti/pull/120/changes the footprints are wrong for am62l needs an update its a bit smaller 0.3 dia is wrong its 0.254 dia

0hmx 4 messages

0hmx - not seeing this when i run locallyhttp...

not seeing this when i run locally https://tscircuit.com/tscircuit/ti/releases/1a2d8fe2 3a34 468a 9557 70d7102d837b

0hmx 3 messages

# contributor10 days ago

mohan-bee - how can i build release to publish ...

how can i build release to publish a site ? i am getting timeout .

mohan-bee 2 messages

# contributor10 days ago

shibo - is this how a fanout should look like? ...

is this how a fanout should look like? mention

shibo 5 messages

# contributor10 days ago

0hmx - Why are these parts not available in JLC...

Why are these parts not available in JLCPCB? I want to make this camera module, but the required camera components are always missing from JLCPCB’s parts library. It keeps asking me to a pre built camera module instead.

0hmx 4 messages

mohan-bee - Got this todayyyy !!!!! super cooll...

Got this todayyyy !!!!! super coollll working great as expected, great work, team !! 🔥🔥

mohan-bee 9 messages

0hmx - are boards that expensive

are boards that expensive

0hmx 10 messages

0hmx - mmm

mmm

0hmx 1 message

Seve - i wonder if we should switch the netlabe...

i wonder if we should switch the netlabel style to altium style net labels

Seve 6 messages

Seve - multi-day project to get these schematic...

multi day project to get these schematics to look basically identical

Seve 12 messages

0hmx - https://github.com/tscircuit/bga-fanout-...

https://github.com/tscircuit/bga fanout solver

0hmx 6 messages

Seve - we really need to make a rockchip board ...

we really need to make a rockchip board for tscircuit/common, rockchip is all over my timeline

Seve 19 messages

Seve - @0hmx new page is indexing all of JLC's ...

mention new page is indexing all of JLC's RAM, we can try to use one of these and connect it to anything https://jlcsearch.tscircuit.com/drams/list

Seve 1 message

# contributor13 days ago

shibo - @Seve the fanout solver can't be used w...

mention the fanout solver can't be used with pipeline 7 right?

shibo 7 messages

Seve - Most in-stock WLEDs

Most in stock WLEDs

Seve 19 messages

Seve - mentioned this to mustafa already but i ...

mentioned this to mustafa already but i like courtyardwidth with "cyw" as an abbreviation when the user wants to manually specify it or we manually compute it in circuit json to footprinter

Seve 1 message

mohan-bee - what is this error ??

what is this error ??

mohan-bee 5 messages

Mustafa7 - @Abse currently footprinter supports...

mention currently footprinter supports params like w h for passives but there are courtyards being generated for custom footprinter strings for passives and also easyeda imports(string like res p4.6599mm pw2.91mm ph2.9106mm) doesnt describe the w/h in the passives strings. So is

Mustafa7 14 messages

Arhan - I’m recreating the Adafruit Feather RP2...

I’m recreating the Adafruit Feather RP2040 USB Host board in TSCircuit from the official Eagle reference. Placement, netlist, TypeScript, and shorts checks pass. After adding the full support net connectivity, autorouting fails with: code sample PCB traces remain unrouted afterwa

Arhan 7 messages