Vivek Vijayan - Is it possible to expose ports/...
Is it possible to expose ports/pins from <subcircuit ?
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Is it possible to expose ports/pins from <subcircuit ?
I would like to do some contribution on tscircuit/common any ideas to start with?
mention we need Vercel deployment for this repo https://github.com/tscircuit/datasheet to tscircuit
mention i think long pin labels we should prefer to have traces for in this case (from your most recent PR, this is the seveibar rp2040 zero snapshot) i think this should absolutely have been a trace
FOR USING CODEX DO NOT SELECT A PROJECT!!! YOU WILL GET BETTER RESULTS
mention I've been creating a repo that allows us to benchmark AI's ability to use TSX to recreate kicad schematics, i think it's really really interesting how we are messing up schematic traces, there is clearly so much work we can do to be conventional/readable
Hi guys.. I've one observation. This is my high level code. code sample If the modules are defined inside <subcircuit , then the <trace will not connect. If modules are defined inside <group , <trace is connects the ports without any issues. Attached images show both conditions C
Can anyone else reproduce this? code sample As I understand connecting two nets via netlabel is kinda invalid, but shouldn't it complete with error rather than being stuck in SimulationSpiceEngineRender? Took me a while to find an offending line, no errors were shown in error lis
is there a way to flip a mosfet, so that the drain is on the opposite side? if I rotate, I need to flip drain and source, but the arrow then would be pointing to the wrong way and probably simulation would be messed up
mention Should keepouts be drawn using the courtyard? courtyard rect already supported.
tscircuit.com needs SSR (server side rendering) in order to have stuff used by AI we probably also shouldn't drop into the editor as often because it makes the files more difficult to read we need to be more like github clicking a file shouldn't automatically open the editor you
mention mention can help review your PRs so that you have an assigned maintainer. Note that often you will need a second review before you're able to merge! For reproductions etc. techmann will merge for you if appropriate
Maybe tscircuit is a wrong tool for a thing I'm building? Here's my use case: https://spice circuit simulation.vercel.app/ The schematic is nice to have really, circuit JSON and manual placement of critical probes and component states Is there someting similar to tscirciuit for v
Regarding jumpers/zero resistors. Is there a way to specify a custom symbol of jumper or 0 ohm resistor? If is set the 0 ohm resistance, simulation complains. If I replace it with <jumper , then it looses the ability to be rotated horizontally and a header appears. Is it possible
Am I not getting something or is it a known limitation? https://tscircuit.com/editor?template=blank circuit board data:application/gzip;base64,H4sIAGodU2oAA7WSXUsrMRCG/0rIlYKN27V76hFXOBxBvBGt4o2RJW7HurI7WZJUKqX/3cl+tLWtWoTuzSYz77x5Mpkpz3AIE+HshJ/wrCi1cWwAKnXs2eiCSW78RnKJEmFSpVON1
Is this an issue with circuit to svg? correct?]
mention https://github.com/tscircuit/check shorts/actions/runs/29109528717/job/86424789636
https://www.youtube.com/watch?v=SUVSwqZazik&time continue=96&source ve path=MjM4NTE&embeds referring euri=https%3A%2F%2Fwww.jitx.com%2F
NEW landing page WIP !!
eval not updating core because of this issue: https://github.com/tscircuit/eval/actions/runs/29202593832/job/86676367387?pr=3204
Note, jscdn, is used, can only be used for things that get bundled prior to shipping to npm
Is it necessary to be logged in before importing JSON?
I wonder why <mosfet doesn't have connections while <resistor does?
New release tracker https://release tracker.tscircuit.com/
https://eleqon.vercel.app/ Use desktop Best viewed on desktop. Tested only at 1080p and 4K. 100% redesigned. 100% billion dollar vibes. Only one swimming pool’s worth of fresh water was boiled to make this.
Could I get everyone’s opinion on this? I added several Board Surface Texture options so we can compare them and choose the best looking one. To test: 1. Make sure Realistic Presentation Mode is enabled. 2. Right click the viewer. 3. Open Board Surface Texture and try the options
Is this the same tech saw this in lumenPnP discord
I'm new, just opened playground and see empty screen with "Run" button spinning. Looked at web console, shows the CDN erroring with 404: Am I doing something wrong?
the mcp adding thing is interesting imo
https://x.com/campedersen/status/2075698706259542090?s=46
quick question: do we need to add add poppygl to @tscircuit/internal dynamic import
This tutorial is almost OK except basically every schematic / pCB view is somewhat brokenhttps://docs.tscircuit.com/tutorials/pi hats/simple buzzer hat
mention can you share the link of the via issue in the pcb view
I keep asking ChatGPT Pro to create circuit boards but it gets super stuck on routing. I think we need to figure out a way to make routing debuggable i introduced tsci build autorouter debug but the information isn't good enough we need to keep interviewing AI and think of ways t
https://github.com/tscircuit/core/actions/runs/29084677835/job/86335477277?pr=2628 Repro106 is taking forever
I think maybe we should not autoroute until the user has fixed all placement errors or passed ignore placement errors, i'm noticing that AI will attempt to autoroute boards that have placement errors
I need someone to write a guide on importing from Ultra Librarian to tscircuit
i believe a circuit board is arriving today, not sure whos
for each of the version bump we are still running the full ci should probably skip or at least the benchmark should be skipped
Isn't it how we should rotate the pinheader component? Am I doing something wrong?
Anyone can help me with a solution for this issue , "edge cutouts are being emitted as separate" That is fine for cutouts fully inside the board, but wrong when the cutout touches the board edge. A circle on the edge becomes a full circle in Gerber, so the outside half makes the
We should throw a warning if anybody uses sequential trace and start deprecating it AI overuses it
mention i'm seeing source errors now is this due to the core update 🤔
Claude design's recreation of the poster
Found a strange rendering issue for UCC28881 component from JLCPCB library. Pin 7 is not present for the IC. But Pin 8 is present. footprint is correct, but schematic symbol fail to capture the detail.
mention , can you check why the Vercel deployment is failing on tscircuit.com after updating RunFrame? https://github.com/tscircuit/tscircuit.com/pull/3843
Hi guys.. I'm facing strange rendering issues in schematic view.
mention mention textures aren't loading for iframe runframe on docs