astrimid - Am I not getting something or is it ...

Just o understand, you want the netlabels there is that right?

If you simply omit them, does that get you something desirable?

One of your nets is effectively given two names i think- i may be wrong. Also generally we just omit manual netlabel elements, unless you want it for some reason (placement?)

long names are also truncated

is it because there's some hardcoded distance between elements?

No its outside the bounds of the svg

This is an “svg not being expanded to full text extent issue” cc <@1507703667237716221>

for now I just want a comon GND symbol below two voltage sources and connecting them to corresponding buses. https://tscircuit.com/editor?template=blank-circuit-board#data:application/gzip;base64,H4sIAHQiU2oAA7WTUU/CMBSF/0rTJ0mgdIMJEkZixBhfiCLhxZplGVec2VqyFoIh/HfbjSG6SWbMnrbec+7tt7PcHQ75ArZEyS0e4DBeiUShKfiBQq+JiBHDiTkwzDjjsE3lQHCp0AykehLrJACJXHTRQO4IXTCO0HCZiPVqZF71QQZvEPsqDCQEKhQccT8Gl2GZtTKM2tp6MHNQuT65nVkHsUSyv/dtRKT8JWQzc9vcpt74RhsPqruz6R5pnqlQGkhwd9e60pX8irOznB+jnN8mFXHvJuMT2mE7j6fBOG7i2OdrP2rBIlSSvEvB9W/YGaOOKI/OW0V+ADFwpfMaoOfsjtSVgmMJkU5XJEZl+GFqU51d80sPdCuk6rHJlLem0uqRy6PVVD9M1SF2XtufDEog0kAb8JTI7ko/xsvnZ8a84SygUx2wS3plgN1aAa1edUCbdMsArXoTpNUBKekXAbukUx/go00715UBaZHOIv366NJ19u4nlQFt4hQRaZ0Bzv9ISMuWpGX9Z0vM44XxPd5/As7zcWgmBgAA

should I use pinheader instead?

are there any hello world examples for power supply schematics?

https://docs.tscircuit.com/guides/spice-simulation/Passive%20Filters/high-pass-filter

maybe

https://tscircuit.com/editor?&snippet_type=board#data:application/gzip;base64,H4sIAFojU2oAA7WTUU/CMBDHv0rTJ0igdIMJEkdixBhfiCLhxZplGRVntpashWAI393rxhBlLjNmT1vv7n/36/3THQ7Fgm+JVls8xGG8kolGU+4HGr0mMkYMJ+bAMBNM8G2aDqRQGs240k9ynQRcIRc1msgdoQYTCF0tE7lejcwvHFTwxmNfh4HigQ6lQMKPucuwyqQMow6UHooF13l+cjuzDsmClP1dt5GR9pc865mXzW3qjW+g8JB1dzbdI+CZSg1AUri79iVE8hGlvZwfrZzfOp3j3k3GpxfRiQ99zXKPjGQVCnMjLSEESlIqMSglitSCTu5BkwncwrEv1n7U5otQK/KupACvd6YQfMj98VYRTIm50GDKED1ns9OqdDtY8QgslInJMvwwtSkY1PrKByDlafYoMuGtibT75OJYaqIfJuoQO4/tTxolPAKgDfe0zGall/Hy/llhLigFdKoD9ki/CLBXK6DVrw5ok14RoFXvBml1QEoG54A90q0P8NGm3evKgPScziKD+ujSh+rdTyoD2sQ5R6R1LnD+R0Ja9Eja1n9eifm8MLHH+0/g/tIXiwYAAA==

it's not only SVG being truncated, the label lenghh doesn't influence the distance between components

yes we don't yet have refdes symbols influence the automatic packing of symbols that is true

i also don't think you can explicitly add a margin

Yeah, the GND part is working. I just need to figure out how to inject power to network and display them

CC <@1079361271687807026>

you're trying to run a analog simulation is that right?

yes, you guessed right

https://docs.tscircuit.com/elements/analogsimulation

Here's a full example I'm working on: For now, I'm just trying to reproduce the schematic. If I produce the full network on a single page, it's even more illegible. So I'm trying to split into groups. But I keep fighting with label placement and long names overlapping with schematic or with other labels. Manual label placement doesn't work, as I can't drag them.

the injectable sources labels are also inconsistent

^^ CC <@1079361271687807026> You definitely need to make sure name is defined for every trace, some of those names are really long as well 🤔

<@1079361271687807026> check out his reference schematic on the right- we should be able to create clean reference schematics like that

we might need a property like hideNetLabel to avoid cluttering

it seems the node placement only allows for 3 symbol names

<@1525187702029549659> fwiw you will need to use schX/schY to set the positions of symbols for a schematic with that level of complexity- you may already have discovered this

> node placement only allows for 3 symbol names Hmm i don't follow

yeah, I'm trying, but those flags won't budge

yea the net labels are basically always automatic right now-

it is an issue

here, only V_V or V_3 part of the name fit

Mustafa has been able to create a lot of schematics that match references but i'm not sure what his magic is

yea i think until we adjust the algorithm to pack those properly your only hope is to use schX/schY on each <voltagesource

Is this the way to do? ``` import manualEdits from "./manual-edits.json"; export const PowerPathControl = () => (   <board routingDisabled manualEdits={manualEdits}> ``` The positions seem to reset after I press run

We are mostly deprecating manualEdits, but it may work- schX/schY props work for all symbols and are our current recommendation

hm. why does schX and schY coordinate system start with negative numbers? I would expect 0,0 to be top left

Is this auto-placed?

yes

Ok will try to fix it thanks

<@1525187702029549659> I couldnt reproduce the issue, this is the result with autolayout.

```export default () => ( <board width="10mm" height="10mm"> <voltagesource name="V_V3_LONG" voltage="5V" connections={{ pin1: "net.VCC", pin2: "net.GND"}} /> <voltagesource name="V_V3_LONG1" voltage="0V" connections={{ pin1: "net.VCC", pin2: "net.GND"}}/> <voltagesource name="V_V3_LONG2" voltage="3V" connections={{ pin1: "net.VCC", pin2: "net.GND"}}/> </board> )```

``` import React from "react" export const TestSources = () => ( <group> <schematicsection name="sources" /> <net name="NET20" /> <net name="NET5" /> <net name="NET3" /> <net name="NET1" /> <netlabel net="NET20" anchorSide="left" connection=".V20_DC_VERY_LONG_NAME .pin1"/> <netlabel net="NET5" anchorSide="left" connection=".V5_DC_DC_VERY_LONG_NAME .pin1" /> <netlabel net="NET3" anchorSide="left" connection=".V3_DC_DC_VERY_LONG_NAME .pin1" /> <netlabel net="NET1" anchorSide="left" connection=".V1_DC_DC_VERY_LONG_NAME .pin1" /> <voltagesource name="V20_DC_VERY_LONG_NAME" voltage={20} schRotation={-90} schSectionName="sources" /> <voltagesource name="V5_DC_DC_VERY_LONG_NAME" voltage={5} schRotation={-90} schSectionName="sources" /> <voltagesource name="V3_DC_DC_VERY_LONG_NAME" voltage={3} schRotation={-90} schSectionName="sources"/> <voltagesource name="V1_DC_DC_VERY_LONG_NAME" voltage={1} schRotation={-90} schSectionName="sources"/> <net name="GND" /> <trace from="V20_DC_VERY_LONG_NAME.pin2" to="net.GND" /> <trace from="V5_DC_DC_VERY_LONG_NAME.pin2" to="net.GND" /> <trace from="V3_DC_DC_VERY_LONG_NAME.pin2" to="net.GND" /> <trace from="V1_DC_DC_VERY_LONG_NAME.pin2" to="net.GND" /> </group> ) ```

I don't know what influences the distance between components

could it be default schematic sheet size?

with schrotation and schsection removed:

when the label size vary, the distance seem to be preserved:

could it be that label width calculated incorrectly?

do you even see this issue on your side?

Hey <@1525187702029549659> , we’ve identified the issue and are currently working on it. It should be fixed soon.

Yes, we found the issue where it is.

Ok so this is the bounds issue from circuit-to-svg? <@1507703667237716221> ?

```import React from "react" export const TestSources = () => ( <group> <schematicsection name="sources" /> <voltagesource name="V20_DC_VERY_LONG_NAME" voltage={20} schSectionName="sources" /> <voltagesource name="V5_DC_DC_VERY_LONG_NAME" voltage={5} schSectionName="sources" /> <voltagesource name="V3_DC_DC_VERY_LONG_NAME" voltage={3} schSectionName="sources"/> <voltagesource name="V1_DC_DC_VERY_LONG_NAME" voltage={1} schSectionName="sources"/> <trace from="V20_DC_VERY_LONG_NAME.pin2" to="net.GND" /> <trace from="V5_DC_DC_VERY_LONG_NAME.pin2" to="net.GND" /> <trace from="V3_DC_DC_VERY_LONG_NAME.pin2" to="net.GND" /> <trace from="V1_DC_DC_VERY_LONG_NAME.pin2" to="net.GND" /> <trace from="V20_DC_VERY_LONG_NAME.pin1" to="net.NET20"/> <trace from="V5_DC_DC_VERY_LONG_NAME.pin1" to="net.NET5" /> <trace from="V3_DC_DC_VERY_LONG_NAME.pin1" to="net.NET3" /> <trace from="V1_DC_DC_VERY_LONG_NAME.pin1" to="net.NET1" /> </group> )``` You caould assign nets using <trace/> as well fwiw.

<@1079361271687807026> this look way better than netlabel. Any way I could change anchorSide?

WIth traces you cannot change anchorside, its only changeable with manual <netlabel/>

so netlabel + schX/Y + achorSide? Any way netlabel schX/Y to be calculated automatically?

No ig manual netlables are not calculated automatically only traces

```import React from "react" export const TestSources = () => ( <group> <net name="NET20" /> <net name="NET5" /> <net name="NET3" /> <net name="NET1" /> <netlabel net="NET20" anchorSide="bottom" connection=".V20 .pin1" schX="1" schY="1" /> <netlabel net="NET5" anchorSide="bottom" connection=".V5_DC_VERY_LONG_NAME .pin1" schX="2" schY="1" /> <netlabel net="NET3" anchorSide="bottom" connection=".V3_DC_VERY_LONG_NAME .pin1" schX="3" schY="1" /> <netlabel net="NET1" anchorSide="bottom" connection=".V1_DC_VERY_LONG_NAME .pin1" schX="4" schY="1" /> <voltagesource name="V20" voltage={20} schRotation="-90" schX="1" schY="0" /> <voltagesource name="V5_DC_VERY_LONG_NAME" voltage={5} schRotation="-90" schX="2" schY="0" /> <voltagesource name="V3_DC_VERY_LONG_NAME" voltage={3} schRotation="-90" schX="3" schY="0" /> <voltagesource name="V1_DC_VERY_LONG_NAME" voltage={1} schRotation="-90" schX="4" schY="0" /> <net name="GND" /> <trace from="V20.pin2" to="net.GND" /> <trace from="V5_DC_VERY_LONG_NAME.pin2" to="net.GND" /> <trace from="V3_DC_VERY_LONG_NAME.pin2" to="net.GND" /> <trace from="V1_DC_VERY_LONG_NAME.pin2" to="net.GND" /> </group> ) ```

So, this is manual placement. Is there any way I could increase the grid size without changing the schX?

GND gets split as I pull nodes apart

I am trying to fix the autolayout to consider the names

Is the real use cases use this lengthy names: "V5_DC_VERY_LONG_NAME"?

I dont think so right?

For this specific case not really, but consider I'd like to put out the resistor specification on a schematic, say "300k_0402_5%" or the name the signal as `${BUSNAME}_${SIGNAL}_${DIRECTION}` to specify what controller it's coming from, what the pin name is and whther it's a sensing or a control signal, eg. VBUS2_ECOK_IN

It would be ok if the component label displayed vertically, like the net labels, but I can't find the option to rotate the label

VBUS2_ECOK_IN will work and won't overlap

It's just that very long names are not handled well currently like "V20_DC_VERY_LONG_NAME" these type of long names

so, is there a limit of number of characters that are handled? BTW, I've just discovered the show grid option. Still strange numbering I would say, but at least I can see the coordinates: VBUS2_EC_OK_IN still overlaps with autorouting ``` import React from "react" export const TestSources = () => ( <group> <schematicsection name="sources" /> <net name="NET20" /> <net name="NET5" /> <net name="NET3" /> <net name="NET1" /> <trace from="VBUS2_ECOK_IN.pin1" to="net.NET20" /> <trace from="VBUS3_ECOK_IN.pin1" to="net.NET5" /> <trace from="VBUS4_ECOK_IN.pin1" to="net.NET3" /> <trace from="VBUS5_ECOK_IN.pin1" to="net.NET1" /> <voltagesource name="VBUS2_ECOK_IN" voltage={20} schRotation={-90} schSectionName="sources" /> <voltagesource name="VBUS3_ECOK_IN" voltage={5} schRotation={-90} schSectionName="sources" /> <voltagesource name="VBUS4_ECOK_IN" voltage={3} schRotation={-90} schSectionName="sources"/> <voltagesource name="VBUS5_ECOK_IN" voltage={1} schRotation={-90} schSectionName="sources"/> <net name="GND" /> <trace from="VBUS2_ECOK_IN.pin2" to="net.GND" /> <trace from="VBUS3_ECOK_IN.pin2" to="net.GND" /> <trace from="VBUS4_ECOK_IN.pin2" to="net.GND" /> <trace from="VBUS5_ECOK_IN.pin2" to="net.GND" /> </group> ) ```

Yep will fix the overlaps

So the 0,0 coordinate is dynamic as the schematic grows, so I should really specify all the coordinates with manual route, as automatic placement will mess up with coordinates

E.g. if I just want to move just one volatage source lower, the coordinates I target will change as the schematic will try to find a new center and my schX/Y will be targeting a moving goalpost

If you want to use mix of auto and manual placement then use schx/schY for component you want to place manually and use schAutoLayoutEnabled prop on board element.

<@1079361271687807026> schAutoLayoutEnabled should be on by default!

So whenever someone uses schX/schY the auto layout turned off for all the components, we would want it to be on by default right so that user won't have to pass schAutoLayoutEnabled={true} when using mixed layout? <@757706909351411845>

yea, it should just be on

Sg!

the auto layout used to be super broken, that's why it's off by default

but we need to start fixing auto layout etc so best to turn it on

To summarise the thread, auto layout doesn't work very well wrt label placement, so you need to use schX/schY. <netlabel> also support X/Y positionining. schMaxTraceDistance controls how far the nodes should be located so that nets are split into separate netlabels. schX/schY coordinate system uses cartesian: `-infinity` at the top, `+infinity` at the bottom, `-infinity` to the left, `+infinity` to the right ``` import React from "react" export const TestSources = () => ( <board routingDisabled schMaxTraceDistance={1}> <net name="DC_IN" /> <net name="GND" /> <net name="DC5_IN" /> <voltagesource name="V_DC_IN" voltage={20} schRotation={0} schX={2} schY={2} /> <voltagesource name="V5_DC_IN" voltage={5} schRotation={0} schX={2} schY={0.5} /> <netlabel net="DC_IN" connection=".V_DC_IN .pin1" anchorSide="bottom" /> <netlabel net="DC5_IN" connection=".V5_DC_IN .pin1" anchorSide="bottom" /> <netlabel net="GND" connection=".V5_DC_IN .pin2" anchorSide="top" schX={3} schY={0.3} /> <trace name="trace_v" from=".V_DC_IN .pin1" to="net.DC_IN" /> <trace name="trace_v5" from=".V5_DC_IN .pin1" to="net.DC5_IN" /> <trace name="trace_gnd" from=".V_DC_IN .pin2" to="net.GND" /> <trace name="trace_gnd5" from=".V5_DC_IN .pin2" to="net.GND" /> </board> ) ```