# mohan-bee - Guys i have been doing some one sho...

Channel: #contributor
Source: https://discord.com/channels/1233487248129921135/1545686558286544937
Started: 2026-09-05T06:46:33.772000+00:00
Last activity: 2026-09-07T16:00:51.490000+00:00

## mohan-bee — 2026-09-05T06:46:32.963000+00:00

Guys i have been doing some one shot prompt board and capture their benchmark to see how the AI working with kicad and tscircuit 

here is the results 

https://tscircuit-gpt-benchmark.vercel.app/
Attachment: image.png — https://community.tscircuit.com/media/1545686558026240021

## mohan-bee — 2026-09-05T06:48:52.321000+00:00

we are doing good in schematic  ig
Attachment: image.png — https://community.tscircuit.com/media/1545687142489915433

## ! Rushabh | Linux Shill — 2026-09-05T14:45:14.222000+00:00

looks good

## ! Rushabh | Linux Shill — 2026-09-05T14:45:34.721000+00:00

but what is this
Attachment: image.png — https://community.tscircuit.com/media/1545807109290066044

## mohan-bee — 2026-09-05T14:45:41.938000+00:00

Easyeda issue

## ! Rushabh | Linux Shill — 2026-09-05T14:57:30.700000+00:00

https://github.com/tscircuit/easyeda-converter/pull/542

## Seve — 2026-09-05T15:41:51.882000+00:00

it's a bit confusing with the time thing

## Seve — 2026-09-05T15:42:13.324000+00:00

we need to measure times well because we're doing really well compared to openai astra for time at the moment

## mohan-bee — 2026-09-05T15:42:25.049000+00:00

Time is not accurate for sure

## mohan-bee — 2026-09-05T15:42:28.954000+00:00

True

## Seve — 2026-09-05T15:42:52.403000+00:00

our schematic seems much worse

## Seve — 2026-09-05T15:42:55.343000+00:00

it's spread out etc

## Seve — 2026-09-05T15:43:02.382000+00:00

good comparison tho

## mohan-bee — 2026-09-05T15:43:18.453000+00:00

yea

## 0hmx — 2026-09-05T15:58:48.002000+00:00

we need to expand this more! maybe an official benchmark were we make model give score and see if we improve or go down i think if we write the rules right it should be deterministic ish most of the time

## Seve — 2026-09-05T15:59:13.851000+00:00

yep 100%

## 0hmx — 2026-09-05T16:00:35.533000+00:00

also our auto router being more successful might be making the model do the placement worse

## Seve — 2026-09-05T16:00:49.029000+00:00

for sure

## mohan-bee — 2026-09-05T21:23:34.160000+00:00

seve what can we do to avoid that spread out in  schematic placement.. because I am noticing this pattern in every one shot prompted board.

## Seve — 2026-09-05T21:30:51.911000+00:00

do we have a warning emitted if there isn't a schematic sheet or if components are outside the schematic sheet?

## Seve — 2026-09-05T21:31:04.197000+00:00

We could also warn on long schematic traces 🤔

## mohan-bee — 2026-09-05T21:31:53.499000+00:00

you mean we need to default to sheets ?

## Seve — 2026-09-05T21:32:10.397000+00:00

no, but we can warn if there's a missing sheet

## mohan-bee — 2026-09-05T21:32:17.992000+00:00

hmm

## Seve — 2026-09-05T21:32:36.085000+00:00

because then it won't spread out components because it'll throw outside-of-sheet errors

## Seve — 2026-09-05T21:32:36.967000+00:00

idk

## Seve — 2026-09-05T21:32:47.394000+00:00

or we just warn on long schematic traces

## Seve — 2026-09-05T21:33:04.632000+00:00

i think that might also be ok but the issue there is it's kind of a schematic trace solver issue

## mohan-bee — 2026-09-05T21:35:09.031000+00:00

🤔 leme try to figure this out to

## mohan-bee — 2026-09-07T06:56:38.492000+00:00

i tried to use the schematicsheet for that sheet .. but the ai just wrapped the large schematic with the sheet using a custom size ..

## mohan-bee — 2026-09-07T06:56:47.670000+00:00

i am not sure what could improve this

## mohan-bee — 2026-09-07T06:56:51.166000+00:00

<@757706909351411845>

## mohan-bee — 2026-09-07T08:31:58.737000+00:00

ai placed component
Attachment: esp32-c3_schematic.png — https://community.tscircuit.com/media/1546437865821577276

## mohan-bee — 2026-09-07T08:32:10.997000+00:00

auto layout
Attachment: w80XMkKzwpUgAAAABJRU5ErkJggg.png — https://community.tscircuit.com/media/1546437917298135061

## mohan-bee — 2026-09-07T08:32:21.803000+00:00

i think autoloayout is doing some good job.

## ! Rushabh | Linux Shill — 2026-09-07T14:40:27.442000+00:00

i think we should avoid using explicit schX and schY then

## Seve — 2026-09-07T15:18:26.589000+00:00

why are we vertically stacking caps like that... that's quite bad haha

## mohan-bee — 2026-09-07T16:00:51.490000+00:00

that is done by astra with schx and schy .