# 0hmx - @Seve @Rishabh was this intended somehow...

Channel: #contributor
Source: https://discord.com/channels/1233487248129921135/1532377575932821616
Started: 2026-07-30T13:21:24.561000+00:00
Last activity: 2026-07-31T13:06:46.209000+00:00

## 0hmx — 2026-07-30T13:21:24.301000+00:00

<@757706909351411845> <@809856037376491570> was this intended somehow?
Attachment: image.png — https://community.tscircuit.com/media/1532377575651934208

## 0hmx — 2026-07-30T13:21:38.082000+00:00

<@1079361271687807026>

## Mustafa7 — 2026-07-30T13:40:41.701000+00:00

Yes that is correct

## Mustafa7 — 2026-07-30T13:43:17.684000+00:00

Name on trace will be a netlabel

## Vanuan — 2026-07-31T13:06:46.209000+00:00

This is an incorrect schematic. It implies there is `t_swdio` port somewhere on another schematic sheet or section. In addition, if it was a proper port, there should be a junction point stemming out from a trace to the port. In addition, this shows the signal is coming from somewhere else to both chips. This is not a correct schematic representation of what tscircuit does to electrical connections or what the code implies.