# astrimid - Regarding multiple components in one...

Channel: #support
Source: https://discord.com/channels/1233487248129921135/1526700084014878780
Started: 2026-07-14T21:21:05.242000+00:00
Last activity: 2026-07-15T01:37:12.294000+00:00

## astrimid — 2026-07-14T21:21:04.745000+00:00

Regarding multiple components in one body.

Another detail directly relevant to manufacturing (but probably not for schematic purposes) is an ability to split one physical component into `A` and `B` part. In this example, PQ203 is a dual MOSFET, meaning it's two independent `<mosfet>` in one PCB body. So pins have continuous numbering across the multiple components in a schematic. 

This is probably the hard one, as you'd need two different view for schematic and PCB trace:
for PCB you must have it as a single chip, while for schematic you'd want A part and B part:

```
    {/* Physical Dual MOSFET package placed on the PCB */}
    <chip name="PQ203" footprint="soic8" />

    {/* PART A: Positioned on the left side of the schematic sheet */}
    <mosfet
      name="PQ203A"
      schX={-15}
      schY={10}
      connections={{
        gate: "net.gate_ctrl_A",
        source: "net.gnd",
        drain: "PQ203.pin8" // Tied to physical pin 8 of the single chip
      }}
    />

    {/* PART B: Positioned far away on the right side of the schematic sheet */}
    <mosfet
      name="PQ203B"
      schX={25}
      schY={-5}
      connections={{
        gate: "net.gate_ctrl_B",
        source: "net.gnd",
        drain: "PQ203.pin5" // Tied to physical pin 5 of the single chip
      }}
    />

```

## astrimid — 2026-07-14T21:21:16.260000+00:00

Don't know if it's possible to hide the `chip` component for schematic, while hiding A and B components for the PCB and still representing these two components as in one physical body. I guess it can be thought of internal implementation of a chip flattened to a schematic.

Maybe something like this:

```
    <DualMosfet
      name="PQ203"
      // Position Part A near your power entry logic
      partA_schX={-20}
      partA_schY={15}
      // Position Part B far away near your switching/control logic
      partB_schX={35}
      partB_schY={-10}
      connections={{
        gateA: "net.gate_ctrl_A",
        sourceA: "net.gnd",
        drainA: "net.vcc_switched",

        gateB: "net.gate_ctrl_B",
        sourceB: "net.gnd",
        drainB: "net.led_driver",
      }}
    />
```

Or maybe this could be a group/subcircuit/chip with ports?

## Seve — 2026-07-14T22:17:19.061000+00:00

hmmm that's interesting and yes i think DualMosfet makes sense

## Seve — 2026-07-14T22:17:32.577000+00:00

the mosfets would be represented with a spice model that contains two mosfets right?

## Seve — 2026-07-14T22:17:37.655000+00:00

it's kind of like a mosfet array

## astrimid — 2026-07-14T23:00:08.812000+00:00

I've looked at DMN65D8LDW manufacturer's SPICE model, and contains only one MOSFET. Additional components in the model provide specification for timing, body diode, resistance, but not the second transistor. So semantically it's 2 MOSFETs in one body.

Does tscircuit already have an array of component packed into one physical chip/group, while specifying properties for each so that they could be split into different parts of the schematic?

## astrimid — 2026-07-14T23:01:25.284000+00:00

Oh, I forgot to attach a reference
Attachment: image.png — https://community.tscircuit.com/media/1526725335679369336

## astrimid — 2026-07-15T00:58:58.648000+00:00

schematic of AC_DISC path.
PQ203A and PQ203B are inside DMN65D8LDW 6 pin chip.

There's a separate use case where DMN65D8LDW has both mosfets acting as one, even though it's 6 pin package.

BTW, couldn't find the sot363 in the footprint list. Maybe footprint should be provided in the `<chip>` while the schematic level mosfets should not required `footprint`.
Attachment: image.png — https://community.tscircuit.com/media/1526754919196004423
Attachment: image.png — https://community.tscircuit.com/media/1526754919661699272

## Seve — 2026-07-15T01:36:21.099000+00:00

yea schematics should run without footprints specified for sure

## Seve — 2026-07-15T01:37:12.294000+00:00

CC <@809856037376491570>