# astrimid - Maybe tscircuit is a wrong tool for ...
Channel: #support
Source: https://discord.com/channels/1233487248129921135/1525844546389409996
Started: 2026-07-12T12:41:29.350000+00:00
Last activity: 2026-07-13T03:13:15.335000+00:00
## astrimid — 2026-07-12T12:41:28.680000+00:00
Maybe tscircuit is a wrong tool for a thing I'm building?
Here's my use case:
https://spice-circuit-simulation.vercel.app/
The schematic is nice to have really, circuit JSON and manual placement of critical probes and component states
Is there someting similar to tscirciuit for virtual benches like that?
Attachment: image.png — https://community.tscircuit.com/media/1525844546473427005
## astrimid — 2026-07-12T12:43:04.659000+00:00
2 days in and I'm still fighting the tool and can't even run a simple simulation.
## astrimid — 2026-07-12T12:45:24.667000+00:00
My hope was I could use groups to show sections of schematic I'm interested in monitoring while simulating, or the whole circuit if not possible. But even placing 5 components in a row is someting schematic visualization is trying to loop in a circle and bend around.
Displaying the whole circuit becomes a soup of net label flags.
## Mustafa7 — 2026-07-12T12:53:18.186000+00:00
Use name on traces that will remove those long connection netlabels
## astrimid — 2026-07-12T13:15:21.538000+00:00
Even on schematic viewer examples, those netlabels appear to be auto generated. This is example12-spice-boost-converter.fixture.tsx
Attachment: image.png — https://community.tscircuit.com/media/1525853072868380843
## astrimid — 2026-07-12T13:16:17.539000+00:00
any sane person would just connect M1 to the junction between L1 and D1, and that R1 resistor wouldn't be hanging alone in the corner
## astrimid — 2026-07-12T13:19:31.661000+00:00
is there any way to produce normal schematics layout, like in a textbook?
## astrimid — 2026-07-12T13:19:52.299000+00:00
with multiple loops
## astrimid — 2026-07-12T13:20:17.260000+00:00
right now it appears only a single loop is possible
## Mustafa7 — 2026-07-12T13:24:52.014000+00:00
I am not sure if <@757706909351411845> would recommend using `schMaxTraceLength` coz currently the whole system of sch routing is based on a distance. However we would have to find a better solution for that
## astrimid — 2026-07-12T13:25:30.304000+00:00
is there any way to specify manual manhattan style routing?
## Mustafa7 — 2026-07-12T13:28:04.792000+00:00
Yea schMaxTraceLength
## Mustafa7 — 2026-07-12T13:28:29.354000+00:00
On board/group/subcircuit
## astrimid — 2026-07-12T13:30:27.766000+00:00
I mean, specify the exact line elbows using schX/schY
## Mustafa7 — 2026-07-12T13:31:50.231000+00:00
No you cannot specify where the elbow should be
## Seve — 2026-07-12T14:09:38.342000+00:00
schMaxTraceLength could be used in this case to achieve more traditional long lines
## Seve — 2026-07-12T14:10:16.104000+00:00
I agree that this is poor routing and shouldnt have long labels in this case- it should just have lines.
## Seve — 2026-07-12T14:12:01.700000+00:00
<@1079361271687807026> i dont think distance is a good to use if its doing this kind of thing- the trace is better than the long labels
## astrimid — 2026-07-12T22:51:09.739000+00:00
I've set schMaxTraceLength high it seems to eliminate the strange net labels. But sometimes I want to disconnect explicitely. Is there a way to force the separate netlabel, e.g. multipe GND drains?
## astrimid — 2026-07-13T02:38:43.596000+00:00
```
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Found a way, netlabels support schX/Y, although this doesn't eliminate the link between grounds
Attachment: image.png — https://community.tscircuit.com/media/1526055246869037218
## astrimid — 2026-07-13T02:43:14.193000+00:00
small nitpick:
netlabel anchorSide top/botom creates a ground symbol, while anchorSide left/right create a flag symbol. This is irrespective of the actual ground vs voltage source. I guess, the schematic/netlabels don't know the semantics behind the source/drain and negative and positive terminals?
## Seve — 2026-07-13T02:45:01.631000+00:00
Its based on the automatic or explicit net classification- you dont want the ground symbol
## astrimid — 2026-07-13T02:49:13.210000+00:00
Still confusing why some nets show up as ground symbol
`V3_VC` is not a ground network, it's connected to pin1 of voltage source, how can it be GND?
Attachment: image.png — https://community.tscircuit.com/media/1526057887124951162
## Seve — 2026-07-13T02:52:06.040000+00:00
Oh… i guess its just a bad choice- we use that for power but yea it should be different
## Seve — 2026-07-13T02:52:11.091000+00:00
Should be an arrow iirc
## Seve — 2026-07-13T02:53:15.193000+00:00
You’re looking for this right?
Attachment: image0.jpg — https://community.tscircuit.com/media/1526058902293188668
## astrimid — 2026-07-13T02:56:50.500000+00:00
arrow would be nice, yeah, but even a small circle would be ok. I'm not sure it tscircuit supports the ANSI/IEC and all the variations of symbols
Attachment: image.png — https://community.tscircuit.com/media/1526059805427368046
## astrimid — 2026-07-13T02:58:19.630000+00:00
maybe some manual classification of netlabels? voltage source (circle), signal (flag) and sink (ground triangle/antenna)
## Seve — 2026-07-13T02:59:11.160000+00:00
We could support that explicitly- we maintain a large symbol library and can add that one
## Seve — 2026-07-13T03:00:17.222000+00:00
Idk if we would default to it, but we may be able to introduce a global setting
## astrimid — 2026-07-13T03:10:51.249000+00:00
stackexchange says the currently used symbol is ok. but only if it points up
https://electronics.stackexchange.com/questions/298727/prefered-schematic-symbol-for-voltage-rail-and-bus-labels
also, bus signals have directionality, didn't look into whether it's currently supported
Attachment: image.png — https://community.tscircuit.com/media/1526063332493365269
Attachment: image.png — https://community.tscircuit.com/media/1526063332879110294
## Seve — 2026-07-13T03:13:15.335000+00:00
Yea it would be simple to add a net label symbol override etc, i think its a good feature